| Master Student Assistant Project: Remunerated, open only to officially registered EPFL students |
Many embedded sensing applications periodically acquire batches of data that are transferred to memory before any processing is performed. This data-transfer time can instead be exploited to perform lightweight inference as the sensor data enters the system, enabling irrelevant data to be discarded and the main processing system to remain inactive.
At the Embedded Systems Laboratory (ESL) of EPFL, we develop X-HEEP, an open-source and highly configurable RISC-V microcontroller platform designed for low-power embedded systems and easy integration of custom hardware accelerators. X-HEEP includes a DMA architecture featuring a FIFO-based interface for tightly coupling streaming accelerators.
The project aims to investigate lightweight streaming wake-up models and exploit the DMA streaming interface to process sensor data directly during acquisition.
The work will first explore, through literature study and Python experiments, which models can operate under strict streaming constraints. The student will investigate small 1D-convolutional pipelines composed of convolution, activation, aggregation and classification, as well as classical approaches such as matched filters. Representative applications, such as IMU-based event detection and voice activity detection (VAD), will be used to compare these approaches. Selected algorithms will then be implemented on the X-HEEP RISC-V CPU to establish a baseline. Based on the results, the project can be extended to the design of a DMA-coupled streaming accelerator capable of executing the selected wake-up pipeline while sensor data is transferred into the system.
This research internship will be carried out at the ESL at EPFL. The student will be under the supervision of Tommaso Terzano, Dr. David Mallasén Quintana, and Prof. David Atienza.
Throughout the project, the student will learn:
- About always-on and wake-up processing for low-power sensing systems.
- How to design and evaluate extremely lightweight machine-learning models.
- How streaming constraints affect neural-network and classical signal-processing algorithms.
- How DMA engines and streaming hardware accelerators can cooperate during sensor acquisition.
- How to approach hardware/software co-design from algorithmic exploration to accelerator design.
Project objectives:
- Study the literature on lightweight wake-up processing, streaming neural networks, and classical event-detection approaches.
- Investigate small 1D-convolutional wake-up models composed of convolution, activation, aggregation, and classification.
- Investigate classical alternatives, particularly matched-filter/FIR-based detection, and compare their suitability for streaming execution.
- Implement and evaluate representative approaches in Python.
- Study the trade-offs between detection performance, computational complexity, memory requirements, and streamability.
- Evaluate representative applications such as IMU-based event detection and voice activity detection.
- Implement selected algorithms in C and deploy them on the X-HEEP RISC-V CPU to establish a software baseline.
- Characterize their execution cost and identify the operations that can be performed directly while sensor data is being transferred by the DMA.
- Define a streaming architecture capable of processing the complete wake-up pipeline through the DMA FIFO interface.
- [IF TIME ALLOWS] Implement and integrate a custom streaming accelerator with the X-HEEP DMA.
Required knowledge and skills:
- Good Python programming skills
- Good C programming skills
- Excellent knowledge of machine learning and digital signal processing
- Basic knowledge of computer architecture and embedded systems
- Confidence working with Linux systems and Git
- Interest in low-power edge AI and hardware/software co-design
- Familiarity with RISC-V, RTL design, or hardware accelerators is a plus
- Autonomy and scientific curiosity
Type of work:
35% Research and algorithm exploration, 30% Python modelling and evaluation, 25% embedded implementation and benchmarking, 10% hardware exploration
Lab: ESL
Section: SEL
Supervisors: Tommaso Terzano, Dr. David Mallasén Quintana, Prof. David Atienza
Lab: ESL
Sections: SEL
Supervisor: Tommaso Terzano, Dr. David Mallasén Quintana, Prof. David Atienza
Contact email: tommaso.terzano@epfl.ch; david.mallasen@epfl.ch; david.atienza@epfl.ch